1. Field of the Invention
The present invention relates generally to printed circuit or wiring board inspection techniques, and more particularly to a technique using X-rays for inspecting solder bonds and traces on such boards.
2. Discussion of the Prior Art
Integrated circuit (IC) devices formed in semiconductor chips are normally encapsulated in ceramic or plastic packages which provide input/output (I/O) pins for connecting the IC terminals to conductive traces to circuits outside of the packages. Conventional IC package pins project from the sides of the package for insertion into holes in a printed circuit board (PCB) or printed wiring board (PWB), where the pins are eventually soldered to conductive traces printed on the board surface around the holes. Recently, however, there has been a trend towards using surface mounted device (SMD) packages having flush I/O leads for being soldered directly onto flat contact pads on the surface of a PCB, rather than having conventional projecting I/O pin leads. SMD packages are smaller and can be mounted on both the top and bottom sides of PCBs, but disadvantageously depend upon their solder bonds ("joints") to mechanically retain the SMD on, as well as electrically connecting it to, the PCB. Packaged I.C. devices assembled on PCBs must withstand and function under various thermal and mechanical stresses. Electrically satisfactory solder bonds may nonetheless be mechanically unsatisfactory, and therefore need to be inspected for such characteristics as quantity, shape and density of solder. In the procedures of positioning SMD packages on boards and of soldering I/O leads to trace contact pads, packages can be placed or shifted out of their proper positions, causing the I/O leads to miss their trace contact pads, or to touch or form bridges to other contact pads. The solder-applying ("screening") mechanism can apply too much or too little solder, or can be misregistered with the board and apply solder off of contact pads. Bad solder paste, inactive flux, or dirty board surfaces can prevent solder from adhering to the leads and/or to the contact pads, and instead form stray solder bridges, wicks, balls, thickenings, delaminations, voids, cracks, inclusions of foreign material, etc. Following the solder screening process, incompletely removed flux can gradually corrode and cause failure of bonds or adjoining components.
Conventional IC packages with projecting I/O pins soldered into holes in circuit boards have been visually inspected for mechanical flaws under optical microscopes. However, increasingly complex and miniaturized very-large-scale integrated (VLSI) and very-high-speed integrated (VHSI) circuits require more (in the range of 84 to 240) I/O leads, which must be spaced relatively closely along the periphery of the packages. In addition, many SMD packages have large numbers of I/O leads requiring solder bonds arrayed beneath the package where they are inaccessable to conventional visual or infared inspection techniques, making the bonds difficult to examine.
FIG. 1 shows a top view of a printed circuit (or printed wiring) board 10 with an upper surface 11 on which SMDs 12 through 17 have been mounted. SMD packages 12 through 17 conceal their underside I/O leads. FIG. 1 also shows the top of a via hole 19 passing vertically through board 10.
FIG. 2 shows a top view of the FIG. 1 board 10 with SMDs 12 through 17 removed from areas 12' through 17' to show the I/O lead contact pads 20 which would be visually inaccessible in actual SMD populated boards. A so-called "area array" package 14 has on its underside a large number of I/O leads (not visible) arranged in concentric ranks with outer ranks overlapping and concealing inner ranks.
FIG. 3 is a vertical cross section taken along FIG. 1 and FIG. 2 lines 3--3 through multiple-layer board 10, through vertical via 19, through conductive traces 22 and ground plane 28 sandwiched between layers, and through SMDs 12-14 mounted on the board surface 11. Solder bonds 25 may be formed (not shown) on the underside 26 of PCB 10. FIG. 3 also shows a die attach bond 27 holding the underside of an IC chip or "die" to the inside floor of SMD package 12. Improper formation or differential expansion of the die, attaching epoxy and/or lead frame can cause delamination of die attach bond 27, comprising the heat-sink function of board 10.
Solder bond interiors have been radiographed ("x-rayed") as disclosed in U.S. Pat. Nos. 3,454,762, 3,889,122, and 3,995,162. These prior art techniques pass X rays perpendicularly through the plane of solder bonds or other features of electronic devices to be examined. However, images of features happening to be in-line with other features in the path of the X-rays are superimposed and indistinguishable in the X-ray projection radiograph. Device feature inspections by infrared and ultrasonic techniques have been tried, but are not well suited for inspecting hidden solder connections 25. Infrared techniques cannot inspect a bond that cannot be seen, and ultrasound techniques only provide two-dimensional images of three-dimensional objects and therefore experience superposed images, do not have sufficient contrast resolution to precisely measure dimensions or density, and do not provide quantitative information.
A lack of adequate non-destructive examination (NDE) procedures has precluded inspecting and using some advanced IC packages with capacities to support higher I/O lead requirements. There remains, therefore, a need for a technique of non-destructive examination of visually inaccessible solder bonds or features of electronic devices to provide quantitative, high-resolution representations of defect conditions.